And so IPv4x is born.
Now, the circuit connected to the DQ calibration control block is essentially a resistor divider circuit with one of the resistors being the poly and the other is the precision 240Ω. When a ZQCL command is issued during initialization, this DQ calibration control block is enabled and an internal comparator within the DQ calibration control block tunes the p-channel devices using VOH[0:4] until the voltage is exactly VDDq/2 (A classic resistor divider). At this point the calibration has been complete and the VOH values are transferred all the DQ pins.
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What is intentionally not there yet:
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